Embodiments of the present invention relate in general to an out-of-order (OoO) processor and more specifically to coalescing global completion table (GCT) entries in an OoO processor.
In an OoO processor, an instruction sequencing unit (ISU) dispatches instructions in groups to various issue queues, renames registers in support of OoO execution, issues instructions from the various issue queues to the execution pipelines, completes executed instructions, and handles exception conditions. Register renaming is typically performed by mapper logic in the ISU before the instructions are placed in their respective issue queues. Dependencies between instructions are tracked using dependency matrices that are located in the issue queues of the ISU, and a GCT in the ISU tracks all in-flight instructions from dispatch to completion.